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-rw-r--r--src/core/arm/arm_interface.h12
-rw-r--r--src/core/arm/dynarmic/arm_dynarmic.cpp31
-rw-r--r--src/core/arm/dynarmic/arm_dynarmic.h12
-rw-r--r--src/core/arm/dyncom/arm_dyncom.cpp12
-rw-r--r--src/core/arm/dyncom/arm_dyncom.h3
5 files changed, 36 insertions, 34 deletions
diff --git a/src/core/arm/arm_interface.h b/src/core/arm/arm_interface.h
index ccd43f431..ba528403c 100644
--- a/src/core/arm/arm_interface.h
+++ b/src/core/arm/arm_interface.h
@@ -41,6 +41,9 @@ public:
/// Clear all instruction cache
virtual void ClearInstructionCache() = 0;
+ /// Notify CPU emulation that page tables have changed
+ virtual void PageTableChanged() = 0;
+
/**
* Set the Program Counter to an address
* @param addr Address to set PC to
@@ -122,12 +125,6 @@ public:
virtual void SetCP15Register(CP15Register reg, u32 value) = 0;
/**
- * Advance the CPU core by the specified number of ticks (e.g. to simulate CPU execution time)
- * @param ticks Number of ticks to advance the CPU core
- */
- virtual void AddTicks(u64 ticks) = 0;
-
- /**
* Saves the current CPU context
* @param ctx Thread context to save
*/
@@ -147,9 +144,6 @@ public:
return num_instructions;
}
- s64 down_count = 0; ///< A decreasing counter of remaining cycles before the next event,
- /// decreased by the cpu run loop
-
protected:
/**
* Executes the given number of instructions
diff --git a/src/core/arm/dynarmic/arm_dynarmic.cpp b/src/core/arm/dynarmic/arm_dynarmic.cpp
index 34c5aa381..2cb56d12f 100644
--- a/src/core/arm/dynarmic/arm_dynarmic.cpp
+++ b/src/core/arm/dynarmic/arm_dynarmic.cpp
@@ -41,7 +41,7 @@ static bool IsReadOnlyMemory(u32 vaddr) {
}
static Dynarmic::UserCallbacks GetUserCallbacks(
- const std::shared_ptr<ARMul_State>& interpeter_state) {
+ const std::shared_ptr<ARMul_State>& interpeter_state, Memory::PageTable* current_page_table) {
Dynarmic::UserCallbacks user_callbacks{};
user_callbacks.InterpreterFallback = &InterpreterFallback;
user_callbacks.user_arg = static_cast<void*>(interpeter_state.get());
@@ -56,16 +56,14 @@ static Dynarmic::UserCallbacks GetUserCallbacks(
user_callbacks.memory.Write16 = &Memory::Write16;
user_callbacks.memory.Write32 = &Memory::Write32;
user_callbacks.memory.Write64 = &Memory::Write64;
- // TODO(Subv): Re-add the page table pointers once dynarmic supports switching page tables at
- // runtime.
- user_callbacks.page_table = nullptr;
+ user_callbacks.page_table = &current_page_table->pointers;
user_callbacks.coprocessors[15] = std::make_shared<DynarmicCP15>(interpeter_state);
return user_callbacks;
}
ARM_Dynarmic::ARM_Dynarmic(PrivilegeMode initial_mode) {
interpreter_state = std::make_shared<ARMul_State>(initial_mode);
- jit = std::make_unique<Dynarmic::Jit>(GetUserCallbacks(interpreter_state));
+ PageTableChanged();
}
void ARM_Dynarmic::SetPC(u32 pc) {
@@ -126,21 +124,15 @@ void ARM_Dynarmic::SetCP15Register(CP15Register reg, u32 value) {
interpreter_state->CP15[reg] = value;
}
-void ARM_Dynarmic::AddTicks(u64 ticks) {
- down_count -= ticks;
- if (down_count < 0) {
- CoreTiming::Advance();
- }
-}
-
MICROPROFILE_DEFINE(ARM_Jit, "ARM JIT", "ARM JIT", MP_RGB(255, 64, 64));
void ARM_Dynarmic::ExecuteInstructions(int num_instructions) {
+ ASSERT(Memory::GetCurrentPageTable() == current_page_table);
MICROPROFILE_SCOPE(ARM_Jit);
std::size_t ticks_executed = jit->Run(static_cast<unsigned>(num_instructions));
- AddTicks(ticks_executed);
+ CoreTiming::AddTicks(ticks_executed);
}
void ARM_Dynarmic::SaveContext(ARM_Interface::ThreadContext& ctx) {
@@ -178,3 +170,16 @@ void ARM_Dynarmic::PrepareReschedule() {
void ARM_Dynarmic::ClearInstructionCache() {
jit->ClearCache();
}
+
+void ARM_Dynarmic::PageTableChanged() {
+ current_page_table = Memory::GetCurrentPageTable();
+
+ auto iter = jits.find(current_page_table);
+ if (iter != jits.end()) {
+ jit = iter->second.get();
+ return;
+ }
+
+ jit = new Dynarmic::Jit(GetUserCallbacks(interpreter_state, current_page_table));
+ jits.emplace(current_page_table, std::unique_ptr<Dynarmic::Jit>(jit));
+}
diff --git a/src/core/arm/dynarmic/arm_dynarmic.h b/src/core/arm/dynarmic/arm_dynarmic.h
index 834dc989e..0b00158a5 100644
--- a/src/core/arm/dynarmic/arm_dynarmic.h
+++ b/src/core/arm/dynarmic/arm_dynarmic.h
@@ -4,12 +4,17 @@
#pragma once
+#include <map>
#include <memory>
#include <dynarmic/dynarmic.h>
#include "common/common_types.h"
#include "core/arm/arm_interface.h"
#include "core/arm/skyeye_common/armstate.h"
+namespace Memory {
+struct PageTable;
+} // namespace Memory
+
class ARM_Dynarmic final : public ARM_Interface {
public:
ARM_Dynarmic(PrivilegeMode initial_mode);
@@ -27,8 +32,6 @@ public:
u32 GetCP15Register(CP15Register reg) override;
void SetCP15Register(CP15Register reg, u32 value) override;
- void AddTicks(u64 ticks) override;
-
void SaveContext(ThreadContext& ctx) override;
void LoadContext(const ThreadContext& ctx) override;
@@ -36,8 +39,11 @@ public:
void ExecuteInstructions(int num_instructions) override;
void ClearInstructionCache() override;
+ void PageTableChanged() override;
private:
- std::unique_ptr<Dynarmic::Jit> jit;
+ Dynarmic::Jit* jit = nullptr;
+ Memory::PageTable* current_page_table = nullptr;
+ std::map<Memory::PageTable*, std::unique_ptr<Dynarmic::Jit>> jits;
std::shared_ptr<ARMul_State> interpreter_state;
};
diff --git a/src/core/arm/dyncom/arm_dyncom.cpp b/src/core/arm/dyncom/arm_dyncom.cpp
index 81f9bf99e..4d72aef77 100644
--- a/src/core/arm/dyncom/arm_dyncom.cpp
+++ b/src/core/arm/dyncom/arm_dyncom.cpp
@@ -25,6 +25,10 @@ void ARM_DynCom::ClearInstructionCache() {
trans_cache_buf_top = 0;
}
+void ARM_DynCom::PageTableChanged() {
+ ClearInstructionCache();
+}
+
void ARM_DynCom::SetPC(u32 pc) {
state->Reg[15] = pc;
}
@@ -73,12 +77,6 @@ void ARM_DynCom::SetCP15Register(CP15Register reg, u32 value) {
state->CP15[reg] = value;
}
-void ARM_DynCom::AddTicks(u64 ticks) {
- down_count -= ticks;
- if (down_count < 0)
- CoreTiming::Advance();
-}
-
void ARM_DynCom::ExecuteInstructions(int num_instructions) {
state->NumInstrsToExecute = num_instructions;
@@ -86,7 +84,7 @@ void ARM_DynCom::ExecuteInstructions(int num_instructions) {
// executing one instruction at a time. Otherwise, if a block is being executed, more
// instructions may actually be executed than specified.
unsigned ticks_executed = InterpreterMainLoop(state.get());
- AddTicks(ticks_executed);
+ CoreTiming::AddTicks(ticks_executed);
}
void ARM_DynCom::SaveContext(ThreadContext& ctx) {
diff --git a/src/core/arm/dyncom/arm_dyncom.h b/src/core/arm/dyncom/arm_dyncom.h
index 62c174f3c..fc1ffed6a 100644
--- a/src/core/arm/dyncom/arm_dyncom.h
+++ b/src/core/arm/dyncom/arm_dyncom.h
@@ -16,6 +16,7 @@ public:
~ARM_DynCom();
void ClearInstructionCache() override;
+ void PageTableChanged() override;
void SetPC(u32 pc) override;
u32 GetPC() const override;
@@ -30,8 +31,6 @@ public:
u32 GetCP15Register(CP15Register reg) override;
void SetCP15Register(CP15Register reg, u32 value) override;
- void AddTicks(u64 ticks) override;
-
void SaveContext(ThreadContext& ctx) override;
void LoadContext(const ThreadContext& ctx) override;
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-12 05:55:54 +0200