diff options
Diffstat (limited to 'src/core/arm/interpreter/arminit.cpp')
-rw-r--r-- | src/core/arm/interpreter/arminit.cpp | 97 |
1 files changed, 66 insertions, 31 deletions
diff --git a/src/core/arm/interpreter/arminit.cpp b/src/core/arm/interpreter/arminit.cpp index 4ac827e0a..680a94a39 100644 --- a/src/core/arm/interpreter/arminit.cpp +++ b/src/core/arm/interpreter/arminit.cpp @@ -18,31 +18,16 @@ #include <cstring> #include "core/arm/skyeye_common/armdefs.h" #include "core/arm/skyeye_common/armemu.h" +#include "core/arm/skyeye_common/vfp/vfp.h" /***************************************************************************\ * Returns a new instantiation of the ARMulator's state * \***************************************************************************/ ARMul_State* ARMul_NewState(ARMul_State* state) { - memset(state, 0, sizeof(ARMul_State)); - state->Emulate = RUN; - for (unsigned int i = 0; i < 16; i++) { - state->Reg[i] = 0; - for (unsigned int j = 0; j < 7; j++) - state->RegBank[j][i] = 0; - } - for (unsigned int i = 0; i < 7; i++) - state->Spsr[i] = 0; - state->Mode = USER32MODE; - state->VectorCatch = 0; - state->Aborted = false; - state->Reseted = false; - state->Inted = 3; - state->LastInted = 3; - state->lateabtSig = HIGH; state->bigendSig = LOW; @@ -55,15 +40,69 @@ ARMul_State* ARMul_NewState(ARMul_State* state) void ARMul_SelectProcessor(ARMul_State* state, unsigned properties) { - state->is_v4 = (properties & (ARM_v4_Prop | ARM_v5_Prop)) != 0; - state->is_v5 = (properties & ARM_v5_Prop) != 0; - state->is_v5e = (properties & ARM_v5e_Prop) != 0; - state->is_v6 = (properties & ARM_v6_Prop) != 0; - state->is_v7 = (properties & ARM_v7_Prop) != 0; - - // Only initialse the coprocessor support once we - // know what kind of chip we are dealing with. - ARMul_CoProInit(state); + state->is_v4 = (properties & (ARM_v4_Prop | ARM_v5_Prop)) != 0; + state->is_v5 = (properties & ARM_v5_Prop) != 0; + state->is_v5e = (properties & ARM_v5e_Prop) != 0; + state->is_v6 = (properties & ARM_v6_Prop) != 0; + state->is_v7 = (properties & ARM_v7_Prop) != 0; +} + +// Resets certain MPCore CP15 values to their ARM-defined reset values. +static void ResetMPCoreCP15Registers(ARMul_State* cpu) +{ + // c0 + cpu->CP15[CP15_MAIN_ID] = 0x410FB024; + cpu->CP15[CP15_TLB_TYPE] = 0x00000800; + cpu->CP15[CP15_PROCESSOR_FEATURE_0] = 0x00000111; + cpu->CP15[CP15_PROCESSOR_FEATURE_1] = 0x00000001; + cpu->CP15[CP15_DEBUG_FEATURE_0] = 0x00000002; + cpu->CP15[CP15_MEMORY_MODEL_FEATURE_0] = 0x01100103; + cpu->CP15[CP15_MEMORY_MODEL_FEATURE_1] = 0x10020302; + cpu->CP15[CP15_MEMORY_MODEL_FEATURE_2] = 0x01222000; + cpu->CP15[CP15_MEMORY_MODEL_FEATURE_3] = 0x00000000; + cpu->CP15[CP15_ISA_FEATURE_0] = 0x00100011; + cpu->CP15[CP15_ISA_FEATURE_1] = 0x12002111; + cpu->CP15[CP15_ISA_FEATURE_2] = 0x11221011; + cpu->CP15[CP15_ISA_FEATURE_3] = 0x01102131; + cpu->CP15[CP15_ISA_FEATURE_4] = 0x00000141; + + // c1 + cpu->CP15[CP15_CONTROL] = 0x00054078; + cpu->CP15[CP15_AUXILIARY_CONTROL] = 0x0000000F; + cpu->CP15[CP15_COPROCESSOR_ACCESS_CONTROL] = 0x00000000; + + // c2 + cpu->CP15[CP15_TRANSLATION_BASE_TABLE_0] = 0x00000000; + cpu->CP15[CP15_TRANSLATION_BASE_TABLE_1] = 0x00000000; + cpu->CP15[CP15_TRANSLATION_BASE_CONTROL] = 0x00000000; + + // c3 + cpu->CP15[CP15_DOMAIN_ACCESS_CONTROL] = 0x00000000; + + // c7 + cpu->CP15[CP15_PHYS_ADDRESS] = 0x00000000; + + // c9 + cpu->CP15[CP15_DATA_CACHE_LOCKDOWN] = 0xFFFFFFF0; + + // c10 + cpu->CP15[CP15_TLB_LOCKDOWN] = 0x00000000; + cpu->CP15[CP15_PRIMARY_REGION_REMAP] = 0x00098AA4; + cpu->CP15[CP15_NORMAL_REGION_REMAP] = 0x44E048E0; + + // c13 + cpu->CP15[CP15_PID] = 0x00000000; + cpu->CP15[CP15_CONTEXT_ID] = 0x00000000; + cpu->CP15[CP15_THREAD_UPRW] = 0x00000000; + cpu->CP15[CP15_THREAD_URO] = 0x00000000; + cpu->CP15[CP15_THREAD_PRW] = 0x00000000; + + // c15 + cpu->CP15[CP15_PERFORMANCE_MONITOR_CONTROL] = 0x00000000; + cpu->CP15[CP15_MAIN_TLB_LOCKDOWN_VIRT_ADDRESS] = 0x00000000; + cpu->CP15[CP15_MAIN_TLB_LOCKDOWN_PHYS_ADDRESS] = 0x00000000; + cpu->CP15[CP15_MAIN_TLB_LOCKDOWN_ATTRIBUTE] = 0x00000000; + cpu->CP15[CP15_TLB_DEBUG_CONTROL] = 0x00000000; } /***************************************************************************\ @@ -71,24 +110,20 @@ void ARMul_SelectProcessor(ARMul_State* state, unsigned properties) \***************************************************************************/ void ARMul_Reset(ARMul_State* state) { - state->NextInstr = 0; + VFPInit(state); state->Reg[15] = 0; state->Cpsr = INTBITS | SVC32MODE; state->Mode = SVC32MODE; - state->Bank = SVCBANK; - FLUSHPIPE; - state->EndCondition = 0; - state->ErrorCode = 0; + ResetMPCoreCP15Registers(state); state->NresetSig = HIGH; state->NfiqSig = HIGH; state->NirqSig = HIGH; state->NtransSig = (state->Mode & 3) ? HIGH : LOW; state->abortSig = LOW; - state->AbortAddr = 1; state->NumInstrs = 0; } |