diff options
Diffstat (limited to 'src/core/arm/dynarmic/arm_dynarmic_32.cpp')
-rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic_32.cpp | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.cpp b/src/core/arm/dynarmic/arm_dynarmic_32.cpp index 781a77f6f..7c82d0b96 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_32.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic_32.cpp @@ -17,6 +17,8 @@ #include "core/arm/dynarmic/arm_exclusive_monitor.h" #include "core/core.h" #include "core/core_timing.h" +#include "core/debugger/debugger.h" +#include "core/hle/kernel/k_process.h" #include "core/hle/kernel/svc.h" #include "core/memory.h" @@ -24,9 +26,6 @@ namespace Core { using namespace Common::Literals; -constexpr Dynarmic::HaltReason break_loop = Dynarmic::HaltReason::UserDefined2; -constexpr Dynarmic::HaltReason svc_call = Dynarmic::HaltReason::UserDefined3; - class DynarmicCallbacks32 : public Dynarmic::A32::UserCallbacks { public: explicit DynarmicCallbacks32(ARM_Dynarmic_32& parent_) @@ -78,16 +77,21 @@ public: } void ExceptionRaised(u32 pc, Dynarmic::A32::Exception exception) override { + if (parent.system.DebuggerEnabled()) { + parent.jit.load()->Regs()[15] = pc; + parent.jit.load()->HaltExecution(ARM_Interface::breakpoint); + return; + } + parent.LogBacktrace(); LOG_CRITICAL(Core_ARM, "ExceptionRaised(exception = {}, pc = {:08X}, code = {:08X}, thumb = {})", exception, pc, MemoryReadCode(pc), parent.IsInThumbMode()); - UNIMPLEMENTED(); } void CallSVC(u32 swi) override { parent.svc_swi = swi; - parent.jit.load()->HaltExecution(svc_call); + parent.jit.load()->HaltExecution(ARM_Interface::svc_call); } void AddTicks(u64 ticks) override { @@ -232,20 +236,16 @@ std::shared_ptr<Dynarmic::A32::Jit> ARM_Dynarmic_32::MakeJit(Common::PageTable* return std::make_unique<Dynarmic::A32::Jit>(config); } -void ARM_Dynarmic_32::Run() { - while (true) { - const auto hr = jit.load()->Run(); - if (Has(hr, svc_call)) { - Kernel::Svc::Call(system, svc_swi); - } - if (Has(hr, break_loop) || !uses_wall_clock) { - break; - } - } +Dynarmic::HaltReason ARM_Dynarmic_32::RunJit() { + return jit.load()->Run(); +} + +Dynarmic::HaltReason ARM_Dynarmic_32::StepJit() { + return jit.load()->Step(); } -void ARM_Dynarmic_32::Step() { - jit.load()->Step(); +u32 ARM_Dynarmic_32::GetSvcNumber() const { + return svc_swi; } ARM_Dynarmic_32::ARM_Dynarmic_32(System& system_, CPUInterrupts& interrupt_handlers_, |