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authorReinUsesLisp <reinuseslisp@airmail.cc>2020-04-04 08:34:08 +0200
committerReinUsesLisp <reinuseslisp@airmail.cc>2020-04-04 08:34:08 +0200
commit16ae98dbb33fe44b3ebe05dcf062a172daab3e7d (patch)
tree9b7e121710f573d1d71bf4b742352a49b4f04c2d /src
parentshader_bytecode: Add encoding for VOTE.VTG (diff)
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Diffstat (limited to 'src')
-rw-r--r--src/video_core/shader/shader_ir.cpp3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/video_core/shader/shader_ir.cpp b/src/video_core/shader/shader_ir.cpp
index baf7188d2..8852c8a1b 100644
--- a/src/video_core/shader/shader_ir.cpp
+++ b/src/video_core/shader/shader_ir.cpp
@@ -359,6 +359,9 @@ Node ShaderIR::GetConditionCode(Tegra::Shader::ConditionCode cc) const {
switch (cc) {
case Tegra::Shader::ConditionCode::NEU:
return GetInternalFlag(InternalFlag::Zero, true);
+ case Tegra::Shader::ConditionCode::FCSM_TR:
+ UNIMPLEMENTED_MSG("EXIT.FCSM_TR is not implemented");
+ return MakeNode<PredicateNode>(Pred::NeverExecute, false);
default:
UNIMPLEMENTED_MSG("Unimplemented condition code: {}", static_cast<u32>(cc));
return MakeNode<PredicateNode>(Pred::NeverExecute, false);