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authorameerj <52414509+ameerj@users.noreply.github.com>2021-09-12 21:18:44 +0200
committerameerj <52414509+ameerj@users.noreply.github.com>2021-09-12 22:19:12 +0200
commit678f73069fd4e151b175aa98bede0cb5839fc8e7 (patch)
treeb381d2b3f046ae064040a5360543ff1773b6731f /src/video_core
parentMerge pull request #6846 from ameerj/nvdec-gpu-decode (diff)
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Diffstat (limited to '')
-rw-r--r--src/video_core/renderer_vulkan/vk_rasterizer.cpp14
1 files changed, 8 insertions, 6 deletions
diff --git a/src/video_core/renderer_vulkan/vk_rasterizer.cpp b/src/video_core/renderer_vulkan/vk_rasterizer.cpp
index 841a6b846..3bcd6d6cc 100644
--- a/src/video_core/renderer_vulkan/vk_rasterizer.cpp
+++ b/src/video_core/renderer_vulkan/vk_rasterizer.cpp
@@ -765,12 +765,7 @@ void RasterizerVulkan::UpdateStencilOp(Tegra::Engines::Maxwell3D::Regs& regs) {
const Maxwell::StencilOp zpass = regs.stencil_front_op_zpass;
const Maxwell::ComparisonOp compare = regs.stencil_front_func_func;
if (regs.stencil_two_side_enable) {
- scheduler.Record([fail, zfail, zpass, compare](vk::CommandBuffer cmdbuf) {
- cmdbuf.SetStencilOpEXT(VK_STENCIL_FACE_FRONT_AND_BACK, MaxwellToVK::StencilOp(fail),
- MaxwellToVK::StencilOp(zpass), MaxwellToVK::StencilOp(zfail),
- MaxwellToVK::ComparisonOp(compare));
- });
- } else {
+ // Separate stencil op per face
const Maxwell::StencilOp back_fail = regs.stencil_back_op_fail;
const Maxwell::StencilOp back_zfail = regs.stencil_back_op_zfail;
const Maxwell::StencilOp back_zpass = regs.stencil_back_op_zpass;
@@ -785,6 +780,13 @@ void RasterizerVulkan::UpdateStencilOp(Tegra::Engines::Maxwell3D::Regs& regs) {
MaxwellToVK::StencilOp(back_zfail),
MaxwellToVK::ComparisonOp(back_compare));
});
+ } else {
+ // Front face defines the stencil op of both faces
+ scheduler.Record([fail, zfail, zpass, compare](vk::CommandBuffer cmdbuf) {
+ cmdbuf.SetStencilOpEXT(VK_STENCIL_FACE_FRONT_AND_BACK, MaxwellToVK::StencilOp(fail),
+ MaxwellToVK::StencilOp(zpass), MaxwellToVK::StencilOp(zfail),
+ MaxwellToVK::ComparisonOp(compare));
+ });
}
}