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| author | ameerj <52414509+ameerj@users.noreply.github.com> | 2021-05-26 04:13:50 +0200 |
|---|---|---|
| committer | ameerj <52414509+ameerj@users.noreply.github.com> | 2021-07-23 03:51:36 +0200 |
| commit | 5399906c26292634ab3eec5fce88640092e9c4c2 (patch) | |
| tree | 1205e3116c0592a42a4ad5173cbf9716372489ac /src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp | |
| parent | glsl: Update phi node management (diff) | |
| download | yuzu-5399906c26292634ab3eec5fce88640092e9c4c2.tar yuzu-5399906c26292634ab3eec5fce88640092e9c4c2.tar.gz yuzu-5399906c26292634ab3eec5fce88640092e9c4c2.tar.bz2 yuzu-5399906c26292634ab3eec5fce88640092e9c4c2.tar.lz yuzu-5399906c26292634ab3eec5fce88640092e9c4c2.tar.xz yuzu-5399906c26292634ab3eec5fce88640092e9c4c2.tar.zst yuzu-5399906c26292634ab3eec5fce88640092e9c4c2.zip | |
Diffstat (limited to '')
| -rw-r--r-- | src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp b/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp index fb2031fc8..c22e5992a 100644 --- a/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp +++ b/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp @@ -687,9 +687,7 @@ void VisitUsages(Info& info, IR::Inst& inst) { case IR::Opcode::LoadStorage32: case IR::Opcode::WriteStorage32: case IR::Opcode::StorageAtomicIAdd32: - case IR::Opcode::StorageAtomicSMin32: case IR::Opcode::StorageAtomicUMin32: - case IR::Opcode::StorageAtomicSMax32: case IR::Opcode::StorageAtomicUMax32: case IR::Opcode::StorageAtomicAnd32: case IR::Opcode::StorageAtomicOr32: @@ -759,6 +757,14 @@ void VisitUsages(Info& info, IR::Inst& inst) { info.used_storage_buffer_types |= IR::Type::U32; info.uses_atomic_f32x2_max = true; break; + case IR::Opcode::StorageAtomicSMin32: + info.used_storage_buffer_types |= IR::Type::U32; + info.uses_atomic_s32_min = true; + break; + case IR::Opcode::StorageAtomicSMax32: + info.used_storage_buffer_types |= IR::Type::U32; + info.uses_atomic_s32_max = true; + break; case IR::Opcode::GlobalAtomicIAdd64: case IR::Opcode::GlobalAtomicSMin64: case IR::Opcode::GlobalAtomicUMin64: |