summaryrefslogtreecommitdiffstats
path: root/src/core/arm/interpreter
diff options
context:
space:
mode:
authorLioncash <mathew1800@gmail.com>2015-01-03 00:21:45 +0100
committerLioncash <mathew1800@gmail.com>2015-01-03 00:29:30 +0100
commit3337b846204c3d18fde4e28ad1558f5e73532ccc (patch)
tree32689d9d8e3c8cb811682c9b025370fa0c332844 /src/core/arm/interpreter
parentMerge pull request #382 from lioncash/sx (diff)
downloadyuzu-3337b846204c3d18fde4e28ad1558f5e73532ccc.tar
yuzu-3337b846204c3d18fde4e28ad1558f5e73532ccc.tar.gz
yuzu-3337b846204c3d18fde4e28ad1558f5e73532ccc.tar.bz2
yuzu-3337b846204c3d18fde4e28ad1558f5e73532ccc.tar.lz
yuzu-3337b846204c3d18fde4e28ad1558f5e73532ccc.tar.xz
yuzu-3337b846204c3d18fde4e28ad1558f5e73532ccc.tar.zst
yuzu-3337b846204c3d18fde4e28ad1558f5e73532ccc.zip
Diffstat (limited to '')
-rw-r--r--src/core/arm/interpreter/armemu.cpp6
-rw-r--r--src/core/arm/interpreter/armsupp.cpp8
2 files changed, 9 insertions, 5 deletions
diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp
index 43b1ba40e..40e4837d8 100644
--- a/src/core/arm/interpreter/armemu.cpp
+++ b/src/core/arm/interpreter/armemu.cpp
@@ -6470,10 +6470,12 @@ L_stm_s_takeabort:
if (BITS(12, 15) != 15) {
state->Reg[rd_idx] += state->Reg[ra_idx];
- ARMul_AddOverflowQ(state, product1 + product2, state->Reg[ra_idx]);
+ if (ARMul_AddOverflowQ(product1 + product2, state->Reg[ra_idx]))
+ SETQ;
}
- ARMul_AddOverflowQ(state, product1, product2);
+ if (ARMul_AddOverflowQ(product1, product2))
+ SETQ;
}
// SMUSD and SMLSD
else {
diff --git a/src/core/arm/interpreter/armsupp.cpp b/src/core/arm/interpreter/armsupp.cpp
index 426b67831..eec34143e 100644
--- a/src/core/arm/interpreter/armsupp.cpp
+++ b/src/core/arm/interpreter/armsupp.cpp
@@ -453,12 +453,14 @@ ARMul_AddOverflow (ARMul_State * state, ARMword a, ARMword b, ARMword result)
ASSIGNV (AddOverflow (a, b, result));
}
-/* Assigns the Q flag if the given result is considered an overflow from the addition of a and b */
-void ARMul_AddOverflowQ(ARMul_State* state, ARMword a, ARMword b)
+// Returns true if the Q flag should be set as a result of overflow.
+bool ARMul_AddOverflowQ(ARMword a, ARMword b)
{
u32 result = a + b;
if (((result ^ a) & (u32)0x80000000) && ((a ^ b) & (u32)0x80000000) == 0)
- SETQ;
+ return true;
+
+ return false;
}
/* Assigns the C flag after an subtraction of a and b to give result. */