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author | Lioncash <mathew1800@gmail.com> | 2015-07-28 04:22:00 +0200 |
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committer | Lioncash <mathew1800@gmail.com> | 2015-07-28 04:22:00 +0200 |
commit | 7e4fb4db193433c77ffd707b62d11e58e46c684e (patch) | |
tree | d0e9acb6e566d23e133bea77c5026f7aeb06e2c8 /src/core/arm/dyncom/arm_dyncom_interpreter.cpp | |
parent | dyncom: Migrate exclusive memory access control into armstate (diff) | |
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Diffstat (limited to '')
-rw-r--r-- | src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 12 |
1 files changed, 3 insertions, 9 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index 69228180e..cdef72be6 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -3471,18 +3471,12 @@ enum { static tdstate decode_thumb_instr(u32 inst, u32 addr, u32* arm_inst, u32* inst_size, ARM_INST_PTR* ptr_inst_base) { // Check if in Thumb mode tdstate ret = thumb_translate (addr, inst, arm_inst, inst_size); - if(ret == t_branch){ - // TODO: FIXME, endian should be judged - u32 tinstr; - if((addr & 0x3) != 0) - tinstr = inst >> 16; - else - tinstr = inst & 0xFFFF; - + if (ret == t_branch) { int inst_index; int table_length = sizeof(arm_instruction_trans) / sizeof(transop_fp_t); + u32 tinstr = GetThumbInstruction(inst, addr); - switch((tinstr & 0xF800) >> 11){ + switch ((tinstr & 0xF800) >> 11) { case 26: case 27: if (((tinstr & 0x0F00) != 0x0E00) && ((tinstr & 0x0F00) != 0x0F00)){ |