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author | Subv <subv2112@gmail.com> | 2015-05-11 01:43:59 +0200 |
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committer | Subv <subv2112@gmail.com> | 2015-05-11 01:43:59 +0200 |
commit | 115ad8e16a69c8823118f210654fc9ea70a03213 (patch) | |
tree | 945fc0617a3329e14f0b4ec3cf2679a0054cbb7b /src/core/arm/dyncom/arm_dyncom.cpp | |
parent | Core/Memory: Give every emulated thread it's own TLS area. (diff) | |
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Diffstat (limited to '')
-rw-r--r-- | src/core/arm/dyncom/arm_dyncom.cpp | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom.cpp b/src/core/arm/dyncom/arm_dyncom.cpp index 1de1d2612..0072ae533 100644 --- a/src/core/arm/dyncom/arm_dyncom.cpp +++ b/src/core/arm/dyncom/arm_dyncom.cpp @@ -90,14 +90,13 @@ void ARM_DynCom::ExecuteInstructions(int num_instructions) { AddTicks(ticks_executed); } -void ARM_DynCom::ResetContext(Core::ThreadContext& context, u32 stack_top, u32 entry_point, u32 arg, u32 tls_address) { +void ARM_DynCom::ResetContext(Core::ThreadContext& context, u32 stack_top, u32 entry_point, u32 arg) { memset(&context, 0, sizeof(Core::ThreadContext)); context.cpu_registers[0] = arg; context.pc = entry_point; context.sp = stack_top; context.cpsr = 0x1F; // Usermode - context.tls = tls_address; } void ARM_DynCom::SaveContext(Core::ThreadContext& ctx) { @@ -124,8 +123,6 @@ void ARM_DynCom::LoadContext(const Core::ThreadContext& ctx) { state->VFP[1] = ctx.fpscr; state->VFP[2] = ctx.fpexc; - - SetCP15Register(CP15_THREAD_URO, ctx.tls); } void ARM_DynCom::PrepareReschedule() { |